1. Field of the Invention
The present invention relates to a semiconductor integrated circuit.
2. Related Art
An internal clock signal of an LSI generally includes jitter, which is temporal fluctuation in a clock signal. Since the jitter causes malfunction of the LSI, a value of the jitter needs to be kept within tolerance.
There are the following methods as examples of a method of measuring jitter of an internal clock signal. One method is a method of outputting a clock signal from a pin of an LSI and measuring jitter in an external measurement apparatus. However, in this method, since an I/O terminal through which a high-speed clock signal in a GHz band can be inputted and outputted is necessary and the external measurement apparatus is also necessary, cost increases.
Another method is a method of generating a reference clock signal and a test data signal, a phase of which is shifted in synchronization with the reference clock signal, in an external IC tester, sampling the test data signal with an internal clock of an integrated circuit, and subjecting a sample signal to statistical processing with the external IC tester and measuring jitter of the internal clock of the integrated circuit (For example, see Japanese Patent Laid-Open No. 10-267999).
However, in this method, the external IC tester is necessary and the test data signal needs to be highly accurately subjected to phase adjustment.
Still another method is a method of qualitatively detect, when a clock generator is a phase lock loop (PLL), swing of a clock from output frequency of a phase error signal outputted from a phase comparator and swing of an LPF voltage. However, in this method, a jitter amount cannot be quantitatively measured and it is difficult to detect jitter failure.
As described above, the jitter measuring methods in the past have a problem in that clock jitter cannot be quantitatively measured in an LSI circuit.